A computer system may include a PCI Express (PCIe) host able to connect between, for example, a processor and other units, e.g., a graphics card, a memory unit, or the like. PCIe is a high-speed serial Input/Output (I/O) protocol utilizing address-based and ID-based data routing. PCIe specifies a hierarchical topology, in which the PCIe host is located at a tree root, and multiple endpoints are attached to the PCIe host, directly and/or through one or more PCIe switches. A PCIe device is identified by a 16-bit ID, which includes a bus number (occupying 8 bits), a device number (occupying 5 bits), and a function number (occupying 3 bits).
PCIe communications utilize address-based routing for memory requests and for I/O requests, and utilize ID-based routing for configuration requests and for completion packets. Each PCIe Transaction Layer Packet (TLP) includes a Requestor ID field having a value which identifies the originator of the transaction. Additionally, a Completion TLP further includes a Completer ID field having a value which identifies the completer device.